The Application of Fair and Equitable Treatment Standard in South Asian Investment Arbitration (2000-2019)
DOI:
https://doi.org/10.58342/ghalibqj.V.15.I.2.6Keywords:
Bilateral Investment Treaties, Fair and Equitable Treatment, Investment Arbitration, Legitimate Expectations, South Asia, Arbitral Tribunal PracticeAbstract
Background and Objective: This article critically examines the application of the Fair and Equitable Treatment (FET) standard in investment arbitration in South Asia between 2000 and 2019, with particular focus on India, Pakistan, and Sri Lanka. Drawing on an analysis of publicly available arbitral awards, the study explores how arbitral tribunals have interpreted the FET standard in relation to treaty formulation, legitimate investor expectations, and State conduct.
Method: This study employs a descriptive-analytical research methodology. Data were collected from library-based sources, authoritative reports, and reliable legal references and were subsequently analyzed using a qualitative analytical approach.
Results: The findings demonstrate that arbitral tribunals tend to interpret standalone FET clauses more broadly, thereby affording greater protection to investors. By contrast, FET clauses expressly linked to customary international law generally require a higher threshold for establishing a breach. Cases concerning India, Dawes, Pakistan, Titan Copper, Sri Lanka, and Deutsche Bank underscore the central role of legitimate expectations in the reasoning of arbitral tribunals. At the same time, other cases demonstrate that a lack of sufficient clarity or evidentiary support may lead to the dismissal of claims.
Conclusion: This article contributes to the theoretical understanding of the FET standard and provides practical guidance for States and investors navigating the evolving landscape of international investment law in South Asia. It highlights the importance of treaty language, the formulation and substantiation of legitimate expectations, and the evidentiary basis required to establish a breach of the FET standard.
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